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Google TPU 8i Max and 8tx: What Two New AI Chips Change

Google's TPU 8i Max doubles compute, SRAM and HBM bandwidth for million-token contexts, while TPU 8tx brings confidential computing to AI inference.

Dr. Nova Chen
Dr. Nova Chen★Nov 9, 2026★4 min read

Google has expanded its eighth-generation Tensor Processing Unit family with two new systems, TPU 8i Max and TPU 8tx, announced on November 9, 2026. The pairing is interesting because each one targets a bottleneck that agentic AI keeps running into: memory bandwidth when contexts stretch toward a million tokens, and trust when sensitive data has to sit in memory while a model works on it. According to Google, this makes four TPU systems introduced in a single year, a first for the program.

  • TPU 8i Max packages two TPU 8i chips together, doubling compute, on-chip SRAM and HBM bandwidth versus TPU 8i
  • TPU 8tx uses TPU 8t silicon with 5th Generation AMD EPYC hosts for confidential, hardware-isolated inference
  • Google says TPU 8tx delivers up to 2x lower latency than TPU 8t by borrowing the low-latency Boardfly network from TPU 8i
  • The new systems join TPU 8t (training) and TPU 8i (reasoning), first shown at Google Cloud Next in April 2026

What Is TPU 8i Max Built For?

The short answer is long context. When many agents work across an entire codebase or hours of video, the limiting factor is often not raw arithmetic but how fast data reaches the processor. Google describes this as the memory wall, and TPU 8i Max is its answer: two low-latency TPU 8i chips on a single package, scaling compute and memory together so the processors stay fed.

Google says TPU 8i Max delivers double the compute, double the SRAM and double the HBM bandwidth of TPU 8i. Because it fits twice the silicon into the existing rack footprint, it also raises compute density per square foot and per watt. SiliconANGLE notes that Google developed it alongside its push to large context windows for Gemini, which supports one million tokens, roughly 750,000 words.

How Does TPU 8tx Keep AI Data Private?

Data is normally encrypted at rest and in transit, but it has to be decrypted in memory while a processor works on it. TPU 8tx moves protection into the hardware layer so data and model weights stay isolated even while in active use. In a briefing reported by Network World, Google Cloud's Mark Lohmeyer described it as the first TPU with confidential computing, built in partnership with AMD, with the full system attested so customers can verify it is what it claims to be.

That matters for regulated industries and public-sector teams that want frontier or proprietary models working directly on sensitive records. Google pitches TPU 8tx as a single system for confidential inference, private fine-tuning, distillation and reinforcement learning, so data never has to move between separate clusters.

The Software Side of the AI Accelerator Story

Hardware alone rarely wins developers, and Google spent much of the announcement on the software stack. It pointed to TorchTPU, open-sourced last month so PyTorch code and Hugging Face models run natively on TPUs, plus TPU backends for the vLLM and SGLang inference engines. A preview TPU agent suite plugs into coding tools to automate onboarding and kernel tuning, and Google says it is open-sourcing TPU Sync, a model-state layer that tiers KV caches across HBM, host memory and storage. Google claims that cuts KV transfer latency and time to first token by more than 90 percent, a figure that comes from the company and is worth watching in independent testing.

Why This Custom AI Silicon Matters

The bigger signal is specialization. Rather than one accelerator for everything, Google now offers four eighth-generation systems mapped to stages of the agent lifecycle: training, low-latency reasoning, confidential computing and long-context density. Google says TPUs now have nearly 100 customers, including frontier labs, trading firms, retailers and universities. For anyone following our AI coverage, this is a clear sign that the next round of AI progress will be shaped as much by memory and trust as by model size. It also builds on Google's broader custom silicon work we covered in Marvell's Google TPU partnership.

Sources: Google Blog — November 9, 2026; SiliconANGLE — November 9, 2026; Network World — November 9, 2026.

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