RK3576 NPU Support Lands in Mainline Linux Via Rocket

Getting RK3576 NPU support into mainline Linux required reverse-engineering registers that appear nowhere in the vendor documentation. Developer Ga Hing Woo (Jiaxing Hu) has brought the Rockchip RK3576's neural processing unit up on the open-source Rocket driver, tested on a Radxa ROCK 4D single-board computer — and the way the work was published is as valuable as the code.

• Compute registers were undocumented — searching "CNA", "CMAC", or "convolution" across the entire technical reference manual returns zero hits
• Single int8 convolution ops now match CPU reference output byte-exactly, with single-task inference working end to end
• Chained multi-task inference still stalls — only the first task per NPU power session computes
• Code, kernel patches, and a research paper are published on GitHub and Zenodo

Why Reverse-Engineering an NPU Is Hard

Rockchip's technical reference manual documents the chip extensively — except for the parts that make the NPU compute. CNX Software reports the TRM runs 4,381 pages without a single hit for the register names that drive convolution. The vendor's own closed-source stack knows where they are; nobody else does.

So the registers had to be inferred from observed behavior. The verification bar here is the impressive part: single int8 convolution operations now produce output that matches the CPU reference implementation *byte-exactly*. That is not "close enough" — it is proof the register semantics were reconstructed correctly rather than approximated. Testing ran on a Radxa ROCK 4D with kernel 7.1-rc5.

What Works and What Doesn't

Single-task inference works end to end. CNX Software reports throughput figures of roughly 13 tokens/sec on Llama-3.2-1B, about 9 tokens/sec on Qwen2.5-1.5B, and around 169 fps on MobileNet — worth noting these numbers appear in CNX's coverage and not in the project's own README, so treat them as CNX-reported rather than vendor-verified.

Chained multi-task inference still stalls: only the first task per NPU power session computes. And here is what makes this release worth writing about — the author published that failure as a deliberate, documented negative result, complete with an explanation that resolving it requires vendor RTL or TRM access nobody outside Rockchip has.

That is falsification-first engineering, and it is rarer than it should be. A project that publishes only its successes leaves the next developer to rediscover the wall independently. This one draws a map with the wall marked on it.

What This Means for SBC Owners

Vendor-neutral, mainline-kernel AI acceleration on affordable single-board computers is the goal a lot of the mini computer community has been circling for years. Closed NPU drivers pin you to a vendor's kernel fork, their release cadence, and their support horizon. A mainline driver outlives all three.

The RK3576 is a mid-range part, not a flagship — which is exactly the point. Boards like the ROCK 4D land in the price range where an NPU is the difference between running a small model locally and not running one at all, the same calculus we walked through in our mini PC buyer's guide for local LLMs. CNX also notes parallel RK3568 work by a developer going by MidG971, suggesting this effort is broadening across the Rockchip line.

Code and kernel patches are on GitHub, with an accompanying paper on Zenodo. If you have a ROCK 4D on the shelf, this is worth an afternoon.

Sources: CNX Software — July 15, 2026; GitHub — linux-rk3576-npu — July 2026.