Edge AI Model Zoo Logs 837 Reproducible NPU Tests

Anyone who has shipped a vision model to embedded hardware knows the gap between the datasheet TOPS figure and what the board actually does at three in the afternoon with a real camera attached. EdgeFirst, the software arm of Au-Zone Technologies, published a model zoo on August 24, 2026 that tries to close that gap the boring way: by measuring everything on real silicon and publishing the receipts.

• Seven repositories cover four YOLO families — YOLOv5, YOLOv8, YOLO11 and YOLO26 — in detection and instance segmentation variants
• Models ship as ONNX FP32 and INT8 alongside platform-compiled artifacts for specific accelerators
• Validation spans NXP NPUs including VeriSilicon, Neutron and Ara240, Raspberry Pi with a Hailo-8L, Nvidia Jetson Orin Nano, Qualcomm Hexagon and the Apple Neural Engine, with CPU references throughout
• EdgeFirst says 837 published validation sessions each link to the model artifact, dataset version, per-stage timing trace and a host description down to kernel version and NPU

Why Reproducible Edge AI Benchmarks Are So Rare

Cloud inference benchmarks are messy but at least comparable — the hardware is broadly known and the software stack is a handful of well-trodden paths. Edge AI is the opposite. The same ONNX file compiled by two different vendor toolchains, quantised with two different calibration sets, running on two kernel versions, can differ by a factor that swamps whatever architectural improvement you were trying to measure.

The result is a literature of unfalsifiable numbers. A vendor publishes a latency figure, you cannot reproduce it, and you have no way to tell whether the difference is your dataset, your quantisation, your thermal envelope or your driver. EdgeFirst's framing for this — that a measured number on real hardware is "the other kind of number" compared to a theoretical spec — is the right diagnosis.

What Does a Validation Session Actually Contain?

This is where the work is. Rather than publishing a table of latencies, each session links the full chain needed to re-run it: which model artifact, which dataset version, a per-stage timing trace so you can see where time went rather than just the total, and a host description precise enough to include the kernel version and the specific NPU.

That last detail matters more than it sounds. Two Raspberry Pi 5 boards with the same Hailo-8L accelerator can behave differently across kernel and driver revisions, and a benchmark that does not record which one it ran on is a number without a coordinate system. Note that these figures come from EdgeFirst itself rather than an independent lab — the value on offer is reproducibility, which is a different and in some ways stronger claim than third-party verification.

Why This Matters If You Build on Small Boards

For anyone choosing hardware for a local vision pipeline, the practical question is never "which NPU is fastest" but "which NPU is fast enough for my model at my resolution within my power budget." A zoo that covers the same four YOLO families across NXP, Hailo, Jetson, Qualcomm and Apple silicon turns that from a procurement gamble into a lookup.

It also lands at a useful moment. The single board computer and NPU module scene is producing new accelerators faster than anyone can independently test them, from 12 TOPS SMARC modules to Jetson-class boxes. Reproducible measurement is the missing half of that story, and publishing the traces rather than the summaries is how it gets fixed. More AI tooling coverage sits on our AI page.

Sources: EdgeFirst on Hugging Face — August 24, 2026.